Multiplier VHDL example -2

The following code compute the square of any input with 10 bits

-- VHDL CODE for MULTIPLIER

-- ----------------------------------

library ieee;
use ieee.numeric_bit ;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;



entity global_mul is
port( num1: in std_logic_vector(9 downto 0);
product: out std_logic_vector(19 downto 0)
);
end global_mul;

architecture behv of global_mul is

begin
process(num1)

variable num1_reg: std_logic_vector(9 downto 0);
variable product_reg: std_logic_vector(19 downto 0);
variable num2:std_logic_vector(19 downto 0);
begin

num1_reg := num1;
product_reg := "00000000000000000000";
num2:= "0000000000" & num1 ;

for i in 0 to 9 loop
if num1_reg(i)='1' then
product_reg := product_reg + num2;
end if;
num2:= num2(18 downto 0)&'0' ;
end loop;

product <= product_reg;

end process;

end behv;